Implementation of a Nonlinear Digital Pre-distortion Algorithm

The evolution from the second generation of mobile communication technology (GSM) to the third generation (UMTS) requires a change of the modulation format. Due to the fact, that in UMTS the information is also packed into the envelope of the transmission signal, a linear amplification without distortions becomes essential. Power amplifiers operate at saturation with the highest efficiency. Their transfer function is therefore nonlinear in this operating mode. To compensate nonlinear effects linearisation methods are employed. One of these methods is digital pre-distortion, whereby the signal is distorted by a pre-distortion filter before it enters the nonlinear amplifier. A model of the amplifier is required to design this filter. With an existing prototyping system it is possible to record a signal, which has been amplified and distorted at 2,45 GHz, with this the power amplifier model and the pre-distortion filter can be calculated in Matlab. Thus, pre-distortion algorithms can be tested with real amplifiers. The connection between the PC and the analogue HF components is realised by a prototyping hardware from Sundance, which consists of several modules. Each of these modules carries an FPGA with available resources. These resources can be used to integrate the pre-distortion filter. In this work, the integration of the pre-distortion in an FPGA is described. The pre-distortion is a nonlinear filter and is created with an approximation method, based on the knowledge of the power amplifier model. Three iterations of the approximation method have been implemented. As approximation method the Secant algorithm has been chosen. This algorithm requires a division operation which had to be implemented additionally in VHDL. The functionality of the pre-distortion filter has been proved by several measurements. The coefficients of the filter are set via a bus system and the pre-distortion is calculated in real-time.